december 2010 ? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 nc7sz66 ? low voltage single spst normally open bus switch nc7sz66 low voltage single spst no rmally open bus switch features ? broad v cc operating range: 1.65v to 5.5v ? rail-to-rail signal handling ? power down high-impedance inputs/outputs ? 5 switch connection between two ports ? minimal propagation delay through the switch ? low i cc ? zero bounce in flow-through mode ? control input compatible with cmos input levels ? ultra-small micropak? packages ? space-saving sot23 and sc70 packages description the nc7sz66 is a ultra high-speed (uhs) cmos compatible single-pole/single-throw (spst) bus switch. the low on resistance of the switch allows inputs to be connected to out-puts with minimal propagation delay and without generating additional ground bounce noise. the device is organized as a 1- bit switch with a switch enable (oe) signal. when oe is high, the switch is on and port a is connected to port b. when oe is low, the switch is open and a high-impedance state exists between the two ports.. ordering information part number top mark package packing method nc7sz66m5x 7z66 5-lead sot23, jedec mo-178 1.6mm 3000 units on tape & reel nc7sz66p5x z66 5-lead sc70, eiaj sc-88a, 1.25mm wide 3000 units on tape & reel nc7sz66l6x ee 6-lead, micropak?, 1x1mm wide 5000 units on tape & reel
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 2 nc7sz66 ? low voltage single spst normally open bus switch connection diagrams figure 1. logic symbol pin configurations figure 2. sc70 and sot23 (top view) figure 3. micropak? (top through view) pin definitions pin # sc70 / sot23 pin # micropak? name description 1 1 a bus a i/o 2 2 b bus b i/o 3 3 gnd ground 4 4 oe switch enable input 5 6 v cc supply voltage 5 nc no connect function table oe b 0 function l high z-state disconnected h a 0 connect h = high logic level l = low logic level
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 3 nc7sz66 ? low voltage single spst normally open bus switch absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage -0.5 7.0 v v s dc switch voltage (1) -0.5 v cc to 0.5 v v in dc input voltage -0.5 7.0 v i ik dc input diode current v in < 0v -50 ma i out dc output sink current 128 ma i cc or i gnd dc v cc or ground current 100 ma t stg storage temperature range -65 +150 c t j junction temperature under bias +150 c t l junction lead temperature (sol dering, 10 seconds) +260 c p d power dissipation at +85c sot-23 200 mw sc70-5 150 esd human body model, jedec:jesd22-a114 4000 v charge device model: jedec:jesd22-c101 1500 note: 1. the input and output negative voltage ratings may be ex ceeded if the input and output diode current ratings are observed. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter conditions min. max. unit v cc supply voltage operating 1.65 5.50 v v in input voltage 0 5.5 v v s switch input voltage 0 v cc v v out output voltage 0 v cc v t r , t f input rise and fall times v cc =2.3v - 3.6v 0 10 ns/v v cc =4.5v ? 5.5v 0 5 switching i/o 0 dc t a operating temperature -40 +85 c ja thermal resistance sot-23 300 c/w sc70-5 425 note: 2. unused inputs must be held high or low; they may not float.
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 4 nc7sz66 ? low voltage single spst normally open bus switch dc electrical characteristics all typical values are at the specified v cc , and t a = 25c. symbol parameter v cc conditions t a =-40 to +85c t a =+25c units min. typ. max. min. typ. v ih high level input voltage 1.65 to 1.95 0.75v cc v 2.30 to 5.50 0.7v cc v il low level input voltage 1.65 to 1.95 0.25v cc v 2.30 to 5.50 0.3v cc i in control input leakage current 0 to 5.5 0 v in 5.5v 0.05 1.00 a i off off leakage current 1.65 to 5.50 0 a, b v cc 0.05 10.00 a r on switch on resistance (3) 4.5 v in =0v, i in =30ma 3 7 v in =2.4v, i in =15ma 5 12 v in =4.5v, i in =30ma 7 15 3.0 v in =0v, i in =24ma 4 9 v in =3v, i in =24ma 10 20 2.30 v in =0v, i in =8ma 5 12 v in =2.3v, i in =8ma 13 30 1.8 v in =0v, i in =4ma 7 28 v in =1.8v, i in =4ma 25 60 r flat on resistance flatness (3,4,5) 5.0 i a =-30ma, 0 v bn v cc 6 3.3 i a =-24ma, 0 v bn v cc 12 2.5 i a =-8ma, 0 v bn v cc 128 1.8 i a =-4ma, 0 v bn v cc 125 i cc quiescent supply current 1.65 to 5.50 v in = v cc or gnd, i out =0 0.05 10.00 a notes: 3. measured by the voltage drop between pins a and b at t he indicated current through the switch. on resistance is determined by the lower of the voltages on the two (a or b) pins. 4. parameter is characterized but not tested in production. 5. flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions.
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 5 nc7sz66 ? low voltage single spst normally open bus switch ac electrical characteristics all typical values are at the specified v cc , and t a = 25c. symbol parameter v cc conditions t a =-40 to +85c, c l =50pf. ru=rd=500 units figure min. typ. max. t phl , t plh propagation delay bus-to-bus (6) 1.65 to 1.95 v in =0pen 4.3 ns figure 5 figure 6 2.3 to 2.7 1.2 3.0 to 3.6 0.8 4.5 to 5.5 0.3 t pzl , t pzh output enable time 1.65 to 1.95 v in =2 x v cc for t pzl , v in =0v for t pzh 1.5 7.0 14.2 ns figure 5 figure 6 2.3 to 2.7 1.5 3.3 7.0 3.0 to 3.6 1.5 2.4 5.5 4.5 to 5.5 1.5 2.0 4.5 t plz , t phz output disable time 1.65 to 1.95 v in =2 x v cc for t plz , v in = 0v for t phz 1.5 9.2 18.2 ns figure 5 figure 6 2.3 to 2.7 1.5 5.3 9.0 3.0 to 3.6 1.5 4.0 7.0 4.5 to 5.5 1.5 2.7 5.0 c in control pin input capacitance v cc =0 2 pf c i/o input / output capacitance v cc =05.0v 6 pf note: 6. this parameter is guaranteed by design but is not te sted. the switch contributes no propagation delay other than the rc delay of the typical on resistance of the switch and the 50pf load capacitance, when driven by an ideal voltage source (zero output impedance). notes: 7. input driven by 50 ; source terminated in 50 . 8. c l includes load and stray capacitance. 9. input prr=1.0mhz; t w =500ns. figure 4. ac test circuit figure 5. ac waveforms
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 6 nc7sz66 ? low voltage single spst normally open bus switch physical dimensions 5 1 4 3 2 land pattern recommendation b a l c 0.10 c 0.20 cab 0.60 ref 0.55 0.35 seating plane 0.25 gage plane 8 0 notes: unless othewise specified a) this package conforms to jedec mo-178, issue b, variation aa, b) all dimensions are in millimeters. 1.45 max 1.30 0.90 0.15 0.05 1.90 0.95 0.50 0.30 3.00 2.60 1.70 1.50 3.00 2.80 symm c 0.95 0.95 2.60 0.70 1.00 see detail a 0.22 0.08 c) ma05brev5 top view (0.30) figure 6. 5-lead sot23, jedec mo-178 1.6mm package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specifications please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/sot23-5l_tr.pdf . package designator tape section cavity number cavity status cover type status m5x leader (start end) 125 (typical) empty sealed carrier 3000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 7 nc7sz66 ? low voltage single spst normally open bus switch physical dimensions figure 7. 5-lead, sc70, eiaj sc-88a, 1.25mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specifications please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf . package designator tape section cavity number cavity status cover type status p5x leader (start end) 125 (typical) empty sealed carrier 3000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 8 nc7sz66 ? low voltage single spst normally open bus switch physical dimensions 2. dimensions are in millimeters 1. conforms to jedec standard m0-252 variation uaad 4. filename and revision: mac06arev4 notes: 3. drawing conforms to asme y14.5m-1994 top view recommened land pattern bottom view 1.45 1.00 a b 0.05 c 0.05 c 2x 2x 0.55max 0.05 c (0.49) (1) (0.75) (0.52) (0.30) 6x 1x 6x pin 1 detail a 0.075 x 45 chamfer 0.25 0.15 0.35 0.25 0.40 0.30 0.5 (0.05) 1.0 5x detail a pin 1 terminal 0.40 0.30 0.45 0.35 0.10 0.00 0.10 cba 0.05 c c 0.05 c 0.05 0.00 5x 5x 6x (0.13) 4x 6x pin 1 identifier (0.254) 5. pin one identifier is 2x length of any 5 other line in the mark code layout. figure 8. 6-lead, micropak?, 1.0mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specifications please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf . package designator tape section cavity number cavity status cover type status l6x leader (start end) 125 (typical) empty sealed carrier 5000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sz66 ? rev. 1.0.4 9 nc7sz66 ? low voltage single spst normally open bus switch
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